sample hold circuit

This AGC system adopts a VGA structure with CMFB and a peak-detect circuit having sample and hold function, and constructs a new-style exponential control circuit.

AGC环路中，采用了带共模反馈的VGA结构，包含一个改进的具有采样保持功能的峰值检测电路，并构造了一种新型的指数控制电路。

This paper describes a light, temperature and speed adjusting DDC system which is composed of MCS-48 series computer, sample-and-hold circuit. In this DDC system PID algorithm is used as the controlling algorithm.

本文主要介绍用mcs-48系列单片机，配以采样保持、A/D、D/A转换和模拟输出驱动板，并采用PID算法进行调节，构成直接数字控制DDC调光、调温、调速系统。